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INTEGRATED CIRCUITS
DATA SHEET
HTRC11001T HITAG reader chip
Product specification Supersedes data of 1999 Jan 01 File under Integrated Circuits, IC11 2001 Nov 23
Philips Semiconductors
Product specification
HITAG reader chip
CONTENTS 1 2 3 4 5 6 7 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 8.7.1 8.7.2 8.8 8.8.1 8.8.2 8.8.3 8.8.4 8.8.5 8.8.6 8.8.7 8.8.8 9 10 11 12 FEATURES APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Power supply Antenna drivers Diagnosis Oscillator with programmable divider Adaptive sampling time demodulator Idle and Power-down mode Serial interface Communication protocol Glitch filter Commands Command READ_TAG Command WRITE_TAG_N Command WRITE_TAG Command READ_PHASE Command SET_SAMPLING_TIME Command GET_SAMPLING_TIME Command SET_CONFIG_PAGE Command GET_CONFIG_PAGE LIMITING VALUES DC CHARACTERISTICS AC CHARACTERISTICS APPLICATION INFORMATION 13 14 14.1 14.2 14.3 14.4 14.5 15 16 17 PACKAGE OUTLINE SOLDERING
HTRC11001T
Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DATA SHEET STATUS DEFINITIONS DISCLAIMERS
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Philips Semiconductors
Product specification
HITAG reader chip
1 FEATURES
HTRC11001T
* Combines all analog RFID reader hardware in one single chip * Optimized for HITAG transponder family * Robust antenna coil power driver stage with modulator * High performance adaptive sampling time AM/PM demodulator (patent pending) * Read and write function * On-chip clock oscillator * Antenna rupture and short circuit detection * Low power consumption * Very low power standby mode * Low external component count * Small package SO14. 2 APPLICATIONS The receiver parameters (gain factors and filter cut-off frequencies) can be optimized to system and transponder requirements. The HTRC11001T is designed for easy integration into RF identification readers. State-of-the-art technology allows almost complete integration of the necessary building blocks. A powerful antenna demodulator and driver, together with a low-noise adaptive sampling time demodulator, a programmable filter, amplifier and digitizer, build the complete transceiver unit, required to design high-performance readers. A three-pin microcontroller interface is employed for programming the HTRC11001T as well as for the bidirectional communication with the transponders. The three-wire interface can be changed into a two-wire interface by connecting the data input and the data output. Tolerance dependent zero amplitude modulation will cause severe problems in envelope detector systems, resulting in the need of very low tolerance reader antennas. These problems are solved by the new Adaptive Sampling Time (AST) technique.
* RFID systems. 3 GENERAL DESCRIPTION
HITAG(1) is the family name of the reader chip HTRC11001T to use with transponders which are based on the HITAG tag ICs (HT1ICS3002x or HT2ICS2002x).
(1) HITAG - is a trademark of Philips Semiconductors Gratkorn GmbH.
4
QUICK REFERENCE DATA SYMBOL PARAMETER supply voltage clock frequency antenna resonant frequency antenna driver output current (peak value) continuous ambient temperature programmable CONDITIONS 4 - - -40 MIN. 4.5 - 125 - - TYP. 5.0 MAX. 5.5 16 - 200 +85 V MHz kHz mA C UNIT
VDD fclk fres Iant(p) Tamb 5
ORDERING INFORMATION PACKAGE
TYPE NUMBER NAME HTRC11001T SO14 DESCRIPTION plastic small outlet package; 14 leads; body width 3.9 mm VERSION SOT108-1
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Philips Semiconductors
Product specification
HITAG reader chip
6 BLOCK DIAGRAM
HTRC11001T
handbook, full pagewidth
VDD
3 TX1 TX2 4 2 ANTENNA DRIVERS MODULATOR CONTROL UNIT SERIAL INTERFACE OSCILLATOR 6 7 8 9 10 XTAL1 XTAL2 SCLK DIN DOUT
RX
14
SYNCHRONOUS DEMODULATOR
BANDPASS FILTER AMPLIFIER DYNAMIC CONTROL DIGITIZER
PHASE MEASUREMENT CONTROL REGISTER 13 QGND 12 CEXT 1 VSS
HTRC11001T
5 MODE
11
MGW265
n.c.
Fig.1 Block diagram.
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Philips Semiconductors
Product specification
HITAG reader chip
7 PINNING SYMBOL VSS TX2 VDD TX1 MODE XTAL1 XTAL2 SCLK DIN DOUT n.c. CEXT QGND RX PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ground supply antenna driver output 2 supply voltage (5 V stabilized) antenna driver output 1 DESCRIPTION
HTRC11001T
control input to enable filtering of serial clock and data input; for active antenna applications oscillator input 1 oscillator input 2 serial clock input of microcontroller interface serial data input of microcontroller interface serial data output of microcontroller interface not connected high-pass filter coupling capacitor connection internal analog virtual ground capacitor connection demodulator input
handbook, halfpage
VSS TX2 VDD TX1 MODE XTAL1 XTAL2
1 2 3 4 5 6 7
MGW266
14 RX 13 QGND 12 CEXT
HTRC11001T 11 n.c.
10 DOUT 9 DIN
8 SCLK
Fig.2 Pin configuration.
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Philips Semiconductors
Product specification
HITAG reader chip
8 8.1 FUNCTIONAL DESCRIPTION Power supply 8.5
HTRC11001T
Adaptive sampling time demodulator
The HTRC11001T works with an external 5 V 10% power supply at pin VDD. The maximum DC current is 2 10 mA + -- x Iant(p) = 137 mA. For optimum performance, the power supply connection should be bypassed to ground with a 100 nF capacitor close to the chip. 8.2 Antenna drivers
The demodulator senses the absorption modulation applied by a transponder when inserted into the field. The signal is picked up at the antenna tap point between La and Ca. It is divided by Rv and the internal resistor Rint to a level on pin RX below 8 V (peak value) with respect to pin QGND (see Fig.4). Internally the signal is filtered with a second-order low-pass filter. The antenna current and therefore the tap voltage is modulated by the transponder in amplitude and/or phase. This signal is fed into a synchronous demodulator recovering the baseband signal. The amplification and the bandpass filter edge frequencies of the demodulator can be adapted to different transponders via settings in the configuration pages (see Table 3). The phase between the driver excitation signal and the antenna tap voltage depends on the antenna tuning. With optimum tuning, the phase of the antenna tap voltage is 90 off the antenna driver signal. Detuning of the antenna resonant circuit results in a change of this phase relationship. The built-in phase measurement unit allows the measurement of this phase relationship with a 1 resolution of ----- x 360 = 5.625 . This can be used to 64 compute a sampling time that compensates the detuning of the reader antenna. The phase measurement procedure can be carried out: * Once before the first communication starts, if the position of the transponder does not change with respect to the reader antenna * During the communication (after sending the write pulses and before receiving the answer of the transponder), if the tag is moving. Before the system is switched into WRITE_TAG mode, the demodulator has to be frozen. This is internally done by clamping the input of the filter amplifier unit to the level on pin QGND. Doing so avoids large transients in the amplifier and digitizer, which could affect settling times. In addition to the clamping, there exist other means in the HTRC11001T which allow further reduction of the settling times. All the parts of the circuitry which are associated with these functions are controlled by the bits FREEZE0, FREEZE1 and THRESET (see Table 2). For more details concerning write timing, demodulator setting, power-up sequence, etc. please refer to the application note "AN 98080 Read/Write devices based on the HITAG Read/Write IC HTRC110".
The drivers deliver a square shaped voltage to the series resonant antenna circuit (see Fig.4). Due to the full bridge configuration of the drivers the output voltage Vant(p-p) is approximately 10 V, corresponding to Vant(p) = 5 V. The current flowing through the antenna is sine shaped and the peak and RMS values are approximately: 4 V ant(p) I ant(p) = -- x -------------- R ant 1 I ant(rms) = ------ x I ant(p) 2 8.3 Diagnosis
In order to detect an antenna short-circuit or open-circuit the antenna tap voltage is monitored. An antenna fail condition is reported in the status bit ANTFAIL (see Table 5) if the antenna tap voltage does not go more negative than the diagnosis level voltage (Vdiag = -1.15 V). This condition is checked for every coil driver cycle. 8.4 Oscillator with programmable divider
The crystal oscillator at pins XTAL1 and XTAL2 works with either crystal or ceramic resonators. It delivers the input clock frequency of 4, 8, 12 or 16 MHz. The oscillator frequency is divided by a programmable divider (selection bits FSEL1 and FSEL0) to obtain the carrier frequency of 125 kHz (see Table 3). Alternatively, an external clock signal (CMOS compatible) may connected to pin XTAL1. For example, this clock signal can be derived from the microcontroller clock.
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Product specification
HITAG reader chip
8.6 Idle and Power-down mode
HTRC11001T
All commands transmitted to the HTRC11001T serial interface start with the Most Significant Bit (MSB). Input DIN and output DOUT are valid when pin SCLK is at HIGH level. 8.7.2 GLITCH FILTER
The HTRC11001T can be switched into the Idle mode via setting bit PD = 1 and resetting bit PD_MODE = 0 (see Table 3). In this Idle mode, only the oscillator and a few other system components are active. It is also possible to switch the HTRC11001T completely off. This is achieved by the Power-down mode (bit PD = 1 and bit PD_MODE = 1). Within this mode also the clock oscillator is switched off. This reduces the supply current of the HTRC11001T to less than 20 A. 8.7 Serial interface
The communication between the HTRC11001T and the microcontroller is done via a 3-wire digital interface. The interface is operated by the following signals: * Clock pulse on pin SCLK * Data input on pin DIN * Data output on pin DOUT. Pins SCLK and DIN are realized as Schmitt-trigger inputs. Pin DOUT is an open-drain output with an internal pull-up resistor. 8.7.1 COMMUNICATION PROTOCOL
Connecting pin MODE to VDD enables digital filtering of the SCLK and the DIN input signals. This mode offers improved immunity against noise and interference (glitches) on these interface signals. It is intended to be used in the so called `active antenna applications' where the microcontroller and the reader communicate via long signal lines (e.g. 1 meter). In other applications pin MODE has to be connected to ground (pin VSS). For a detailed description of this feature, refer to the application note "AN 98080 Read/Write devices based on the HITAG Read/Write IC HTRC110".
Every communication between the HTRC11001T and the microcontroller begins with an initialization of the serial interface. The interface initialization condition is a LOW-to-HIGH transition on pin DIN while pin SCLK is at HIGH level (see Fig.3).
handbook, full pagewidth
initialization t su
th
SCLK
DIN
D7
D6
D1
D0
DOUT
D7
D6
D1
D0
MGW268
Fig.3 Serial interface communication protocol.
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Philips Semiconductors
Product specification
HITAG reader chip
8.8 Commands Summary of the HTRC11001T command set BIT 7 BIT 6 COMMAND NAME MSB READ_TAG WRITE_TAG_N WRITE_TAG READ_PHASE SET_SAMPLING_TIME GET_SAMPLING_TIME SET_CONFIG_PAGE GET_CONFIG_PAGE 1 0 1 0 0 1 0 0 0 0 X3 8.8.1 COMMAND READ_TAG NAME Command bits BIT 7 1 BIT 6 1 BIT 5 1 BIT 4 - BIT 3 - BIT 2 - 1 0 1 0 0 0 0 0 1 0 X2 1 0 0 0 D5 D5 0 D5 P1 0 X1 - 1 - 0 D4 D4 0 D4 P0 0 X0 - N3 - 1 D3 D3 0 D3 D3 0 D3 - N2 - 0 D2 D2 0 D2 D2 1 D2 - N1 - 0 D1 D1 1 D1 D1 P1 D1 LSB - N0 - 0 D0 D0 0 D0 D0 P0 D0 BIT5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
HTRC11001T
Table 1
REMARK READ_TAG mode WRITE_TAG mode with pulse width programming WRITE_TAG mode read command response read command response 4 x 4 configuration bits available read command response
BIT 1 -
BIT 0 -
This command is used to read the demodulated bit stream from a transponder. After the assertion of the three command bits the HTRC11001T instantaneously switches to the READ_TAG mode and transmits the demodulated, filtered and digitized data to the microcontroller. This data should be decoded by the microcontroller. The READ_TAG mode is terminated by a LOW-to-HIGH transition on pin SCLK. 8.8.2 COMMAND WRITE_TAG_N NAME Command bits BIT 7 0 BIT 6 0 BIT 5 0 BIT 4 1 BIT 3 N3 BIT 2 N2 BIT 1 N1 BIT 0 N0
This command is used to write data to a transponder. If bits N3 to N0 are set to 0000, the signal on pin DIN is transparently switched to the drivers. A HIGH level on pin DIN corresponds to antenna drivers switched off and a LOW level corresponds to antenna drivers switched on. For any binary number N between 0001 and 1111, the drivers are switched off at the next positive transition on pin DIN. This state is held for a time interval t = N x T0 (for T0 = 8 s). This method relaxes the timing resolution requirements to the microcontroller and to the software implementation while providing an exact, selectable write pulse timing. The WRITE_TAG mode is terminated immediately by a LOW- to-HIGH transition on pin SCLK.
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Philips Semiconductors
Product specification
HITAG reader chip
8.8.3 COMMAND WRITE_TAG NAME Command bits BIT 7 1 BIT 6 1 BIT 5 0 BIT 4 - BIT 3 - BIT 2 -
HTRC11001T
BIT 1 -
BIT 0 -
This is the 3-bit short form of the previously described command WRITE_TAG_N. It allows to switch into the WRITE_TAG mode with a minimum communication time. The behaviour of the WRITE_TAG command is identical to WRITE_TAG_N with two exceptions: * WRITE_TAG mode is entered after assertion of the third command bit * No N parameter is specified with this command; instead the N value which was programmed with the most recent WRITE_TAG_N command is used. If no WRITE_TAG_N was issued so far, a default N = 0 (transparent mode) will be assumed. 8.8.4 COMMAND READ_PHASE NAME Command bits Response bits BIT 7 0 0 BIT 6 0 0 BIT 5 0 D5 BIT 4 0 D4 BIT 3 1 D3 BIT 2 0 D2 BIT 1 0 D1 BIT 0 0 D0
This command is used to read the antenna phase, which is measured at every carrier cycle. The response bits D5 to D0 represent the phase (coded binary). 8.8.5 COMMAND SET_SAMPLING_TIME NAME Command bits BIT 7 1 BIT 6 0 BIT 5 D5 BIT 4 D4 BIT 3 D3 BIT 2 D2 BIT 1 D1 BIT 0 D0
This command specifies the demodulator sampling time ts. The sampling time is coded binary in bits D5 to D0. 8.8.6 COMMAND GET_SAMPLING_TIME NAME Command bits Response bits BIT 7 0 0 BIT 6 0 0 BIT 5 0 D5 BIT 4 0 D4 BIT 3 0 D3 BIT 2 0 D2 BIT 1 1 D1 BIT 0 0 D0
This command is used to read back the sampling time ts set with SET_SAMPLING_TIME. The response bits D5 to D0 represent the sampling time (coded binary).
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Product specification
HITAG reader chip
8.8.7 COMMAND SET_CONFIG_PAGE NAME Command BIT 7 0 BIT 6 1 BIT 5 P1 BIT 4 P0 BIT 3 D3 BIT 2 D2
HTRC11001T
BIT 1 D1
BIT 0 D0
This command is used to set the filter and amplifier parameters (cut-off frequencies and gain factors) and to select the operation mode. Bits P1 and P0 select one of four configuration pages. Table 2 Configuration page bit names BIT 7 0 0 0 0 6 1 1 1 1 P1 0 0 1 1 P0 0 1 0 1 D3 GAIN1 PD_MODE THRESET DISLP1 PD ACQAMP DISSMARTCOMP D2 GAIN0 D1 FILTERH HYSTERESIS FREEZE1 FSEL1 D0 FILTERL TXDIS FREEZE0 FSEL0
COMMAND PAGE NUMBER SET_CONFIG_PAGE 0 SET_CONFIG_PAGE 1 SET_CONFIG_PAGE 2 SET_CONFIG_PAGE 3
Table 3
Description of the configuration page bits VALUE DESCRIPTION main low-pass cut-off frequency 0 1 fL = 3 kHz fL = 6 kHz main high-pass cut-off frequency 0 1 fH = 40 kHz fH = 160 kHz amplifier 0 gain factor 0 1 gain = 16 gain = 32 amplifier 1 gain factor 0 1 gain = 6.22 gain = 31.5 disable coil driver 0 1 coil driver active coil driver inactive data comparator hysteresis 0 1 hysteresis OFF hysteresis ON Power-down mode enable 0 1 device active device power-down 0 0 0 1 0 0 0 INITIAL VALUE
BIT NAME FILTERL
FILTERH
GAIN0
GAIN1
TXDIS
HYSTERESIS
PD
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Product specification
HITAG reader chip
HTRC11001T
BIT NAME PD_MODE
VALUE select Power-down mode 0 1 Idle mode Power-down mode
DESCRIPTION
INITIAL VALUE 0
FREEZE1, FREEZE0
facility to achieve fast settling times (MSB and LSB) 00 01 10 11 normal operation main low-pass is frozen; main high-pass is pre-charged to level on pin QGND main low-pass is frozen; time constant of main high-pass is reduced by a factor of 16 for bit FILTERH = 0 and by a factor of 8 for bit FILTERH = 1 main high-pass time constant is reduced by a factor of 16 for bit FILTERH = 0 and by a factor of 8 for bit FILTERH = 1; second high-pass is pre-charged store signal amplitude (see also bit AMPCOMP in Table 5) 0 1 set status bit AMPCOMP when the actual data signal amplitude is higher than the stored reference store actual amplitude of the data signal as reference for later amplitude comparison reset threshold generation of digitizer 0 1 no reset reset clock frequency selection (MSB and LSB) 00 01 10 11 4 MHz 8 MHz 12 MHz 16 MHz disable smart comparator 0 1 smart comparator: on smart comparator: off disable low-pass 1 0 1 low-pass: on low-pass: off 0 0 00 0 0 00
ACQAMP
THRESET
FSEL1, FSEL0
DISSMARTCOMP
DISLP1
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Philips Semiconductors
Product specification
HITAG reader chip
8.8.8
?
HTRC11001T
COMMAND GET_CONFIG_PAGE NAME BIT 7 0 X3 BIT 6 0 X2 BIT 5 0 X1 BIT 4 0 X0 BIT 3 0 D3 BIT 2 1 D2 BIT 1 P1 D1 BIT 0 P0 D0
Command bits Response bits
This command has three functions: 1. Reading back the configuration parameters set by command SET_CONFIG_PAGE 2. Reading back the transmit pulse width programmed with command WRITE_TAG_N 3. Reading the system status information. Bits P1 and P0 select one of four configuration pages. The response bits (X3 to X0 and D3 to D0) contains the contents of the selected configuration page in its lower nibble. For page 0 and page 1 the higher nibble reflects the current setting of the transmit pulse width N. For page 2 and page 3 the system status information is returned in the higher nibble. Table 4 Configuration page bit names BIT X3 N3 N3 0 (RFU) 0 (RFU) X2 N2 N2 0 (RFU) 0 (RFU) X1 N1 N1 AMPCOMP AMPCOMP X0 N0 N0 ANTFAIL ANTFAIL 3 D3 D3 D3 D3 2 D2 D2 D2 D2 1 D1 D1 D1 D1 0 D0 D0 D0 D0
COMMAND PAGE NUMBER GET_CONFIG_PAGE 0 GET_CONFIG_PAGE 1 GET_CONFIG_PAGE 2 GET_CONFIG_PAGE 3 Table 5
Description of the configuration page bits VALUE XXXX XXXX 0 1 DESCRIPTION contents of the selected configuration page current setting of the transmit pulse width antenna failure no antenna failure antenna failure amplitude comparison result (see also bit ACQAMP in Table 3) 0 1 actual data signal amplitude is lower than the stored reference actual data signal amplitude is higher than the stored reference
BIT NAME D3 to D0 N3 to N0 ANTFAIL
AMPCOMP
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Product specification
HITAG reader chip
9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); note 1. SYMBOL Vn Vn(max) VRX Tj(max) Tstg Note PARAMETER voltage at any pin (except pin RX) maximum voltage at any pin with respect to VDD (except pin RX) voltage at pin RX maximum junction temperature storage temperature MIN. -0.3 -0.3 -10 - -65
HTRC11001T
MAX. +6.5 +12 140 +125 V V VDD + 0.3 V
UNIT
C C
1. Stress above one or more of the limiting values may cause permanent damage to the device. These are stresses ratings only and operation of the device at these or at any other conditions above those given in Chapter 10 not implied. Exposure or limiting values for extended periods may affect device reliability. 10 DC CHARACTERISTICS All voltages are measured with respect to ground (pin VSS); Tamb = -40 to +85 C SYMBOL Supply VDD IDD Iidle Ipd Iant(p) supply voltage supply current idle current power-down current VDD = 5.5 V; ITX1 = ITX2 = 0 VDD = 5.5 V; note 1 VDD = 5.5 V 4.5 - - - - - - -8 -1.5 0.35VDD 17 5.0 4 0.2 7 - - 2.5 - -1.15 0.42VDD 25 5.5 10 0.4 20 V mA mA A mA mA V V V k PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Driver outputs (pins TX1 and TX2) antenna driver output current permanent (peak value) pulse load; ton < 400 ms; ratio on : off = 1 : 4 output resistance both drivers together 200 400 7
Ro VI Vdiag VQGND Ri
Demodulator input (pin RX) input voltage diagnosis level voltage potential on pin QGND internal demodulator impedance with respect to pin QGND with respect to pin QGND; VDD = 5 V +8 -0.8 0.50VDD 33
Digital inputs VIH VIL VOL IOL Note 1. Power consumption of external quartz or any other component is not included. 2001 Nov 23 13 HIGH-level input voltage LOW-level input voltage 0.7VDD -0.3 IOL(max) = 1 mA VOL 0.4 V - 1 - - - - VDD + 0.3 V V 0.3VDD 0.4 - V
Digital outputs LOW-level output voltage LOW-level output current V mA
Philips Semiconductors
Product specification
HITAG reader chip
11 AC CHARACTERISTICS Tamb = -40 to +85 C. SYMBOL PARAMETER CONDITIONS MIN. - 4 5 1.3 TYP.
HTRC11001T
MAX.
UNIT
Oscillator inputs (pins XTAL1 and XTAL2) fosc tst Ci Ri oscillator frequency start-up time input capacitance on pin XTAL1 input resistance between pins XTAL1 and XTAL2 depending on bits FSEL1 and FSEL0 4 - - 0.9 16 10 - 3.0 MHz ms pF M
External clock input (pin XTAL1) fext tsu th VRX(p-p) td external clock frequency duty cycle depending on bits FSEL1 and FSEL0 4 40 - - - - 1 310 175 - - 0.7 - 16 60 - - - 340 190 MHz %
Serial interface set-up time hold time pin MODE at VSS pin MODE at VSS receiver input bit FILTERL = 0 bit FILTERL = 1 Demodulator valid time trec demodulator recovery time after clock stable; note 1 after WRITE-pulse; note 1 after AST-step Note 1. These short times require special command sequences. Please refer to the application note "AN 98080 Read/Write devices based on the HITAG Read/Write IC HTRC110". phase measurement error - - - - 5 500 1.5 5.7 ms s ms deg 50 50 ns ns
Receiver (pin RX) sensitivity (peak-to-peak value) receiver delay 2 290 160 mV s s
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Product specification
HITAG reader chip
12 APPLICATION INFORMATION Figure 4 shows a minimal application circuitry for the HTRC11001T. The reader coil La together with the capacitor Ca forms a series resonant LC circuit (f0 = 125 kHz). The high voltages in the LC circuit are divided to safe operating levels by Rv and the internal resistor Ri behind pin RX. The two capacitors connected to pin XTAL1 and pin XTAL2 shall be the recommended values and types from the data sheet of the crystal.
HTRC11001T
Alternatively to a crystal, a ceramic resonator can be used or an external clock source can be connected to pin XTAL1.
handbook, full pagewidth
VDD 10 F 100 nF
Rv Ca
VSS TX2 VDD TX1 MODE XTAL1 XTAL2
1 2 3 4 5 6 7
14 13 12
RX QGND CEXT n.c. DOUT DIN SCLK to microcontroller 100 nF 100 nF
La
HTRC11001T
11 10 9 8
MGW267
Fig.4 Minimum application circuitry.
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Product specification
HITAG reader chip
13 PACKAGE OUTLINE SO14: plastic small outline package; 14 leads; body width 3.9 mm
HTRC11001T
SOT108-1
D
E
A X
c y HE vMA
Z 14 8
Q A2 A1 pin 1 index Lp 1 e bp 7 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
inches 0.069
0.010 0.057 0.004 0.049
0.019 0.0100 0.35 0.014 0.0075 0.34
0.244 0.039 0.041 0.228 0.016
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
2001 Nov 23
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Product specification
HITAG reader chip
14 SOLDERING 14.1 Introduction to soldering surface mount packages
HTRC11001T
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. 14.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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HITAG reader chip
14.5 Suitability of surface mount IC packages for wave and reflow soldering methods
HTRC11001T
SOLDERING METHOD PACKAGE WAVE BGA, HBGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS PLCC(3), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not not not suitable(2) recommended(3)(4) recommended(5) suitable REFLOW(1) suitable suitable suitable suitable suitable
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Product specification
HITAG reader chip
15 DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS
HTRC11001T
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 16 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 17 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2001 Nov 23
19
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2001
SCA73
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613502/02/pp20
Date of release: 2001
Nov 23
Document order number:
9397 750 08329

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